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HSIO Electrical Validation Engineer
HSIO Electrical Validation EngineerNVIDIA • Santa Clara, CA, United States
HSIO Electrical Validation Engineer

HSIO Electrical Validation Engineer

NVIDIA • Santa Clara, CA, United States
2 days ago
Job type
  • Full-time
Job description

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to resolve, that only we can seek, and that matter to the world. This is our life’s work, to amplify human inventiveness and intelligence.

NVIDIA’s High-Speed Interconnect (HSIC) team is seeking a versatile engineer to be part of a Silicon Hardware team. You will dive into next-gen high speed interconnects like NVLink and NVLink-C2C to make advancements in efficiency and stability. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from artificial intelligence, consumer graphics, self-driving cars, and more.

What you’ll be doing :

Silicon bringup, validation, and debug NVIDIA’s multiple HSIOs, including NVLink and NVLink-C2C.

Own the post-silicon electrical validation of Chip-to-Chip (C2C) and NVLink high-speed interfaces across multiple product lines (GPU, CPU, DPU, SoC).

Develop validation plans, test methodologies, and automation frameworks for link bring-up, margining, and compliance.

Execute validation of signal integrity (SI), power integrity (PI), timing margins, equalization tuning, and error metrics across PCIe Gen5 / Gen6, C2C, and NVLink interconnects.

Debug link-level and system-level electrical issues including jitter, crosstalk, transient noise, BER, and channel loss problems.

Collaborate closely with design, architecture, system, and SI / PI teams to ensure robust interface design and production-level performance.

Characterize link health under PVT (process, voltage, temperature) corners and stress conditions to ensure product reliability.

Deliver data analysis, reports, and recommendations to influence design decisions and drive issue resolution.

Investigate HSIO power features, datapath analysis, and electrical for the next generation of products.

Power feature char and tuning for key use cases, balancing performance and power.

What we need to see :

BS or MS degree in EE / CE or equivalent experience

8+ years working on bringup, validation, or design of HSIOs (eg : PCIE / CXL, DDR, USB, UCIE)

Experience with HSIOs like PCIE or chip-to-chip interconnects including understanding of process / temp / voltage sensitivity.

Understanding of HSIO power management

Understanding of firmware / driver structures and their interaction with Hardware.

Strong EE fundamentals, knowledgeable in computer architecture, high speed interfaces, timing analysis, process variations, statistical error rates and power analysis.

Enjoy working in a collaborative environment.

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We welcome you to join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.

#LI-Hybrid

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

You will also be eligible for equity and benefits () .

Applications for this job will be accepted at least until October 31, 2025.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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Validation Engineer • Santa Clara, CA, United States

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