Analog Devices, Inc. is looking for an IC LAYOUT ENGINEER to join our A2B team in Massachusetts . The candidate will be self-motivated and able to work effectively with a talented group of individuals across multiple development locations.
The candidate will join a team of Analog, Digital, Mixed-Signal CMOS design and verification engineers implementing state of the art mixed-signal ICs.
Responsibilities :
- IC Mask Layout Design
- Collaborate with designers to understand circuit sensitivities of circuits like amplifiers, ADCs, DACs, bandgaps, filters, LDOs, PLLs, and charge-pumps
- Take ownership of layout of analog and mixed-signal designs from the IP level to chip integration level, includingschedulingfloorplanningverification (DRC / LVS)tapeout.
- Interact with digital implementation teams to assemble the entire IC
Key Competencies Required
- Experience in use of Cadence Virtuoso IC61 / IC18 / IC20
- High proficiency in use of VXL
- Experience in use of Mentor Graphics Calibre
- Experience with IP and chip-level floorplanning
- High proficiency in interpretation of LVS / DRC / ERC / ANTENNA / DENSITY / DFM
- Expertise in standard layout practices such as matching, parasitic reduction, noise isolation, supply routing, latch up, shielding, and well and substrating techniques
- Experience in ESD-resilient layout an advantage, but not required
- Excellent communication, planning, organizational skills.
- Ability to work independently and collaboratively in a global team environment
- Scripting skills in PERL, python, or SKILL and familiarity with PNR flows considered an advantage, but not required
Key Qualifications :
- BSEE or equivalent
- 3+ years experience in IC Layout
- Scripting skills in PERL, python or SKILL are considered a plus, but not required
- Good team worker with multi-discipline, multi-cultural and multi-site environments
LI-PG1
Job Req Type : ExperiencedRequired Travel : NoShift Type : 1st Shift / Days
30+ days ago