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Fpga design engineer • san jose ca
- Promoted
FPGA / ASIC Validation, Staff Engineer
SynopsysSunnyvale, CA, US- Promoted
FPGA Design Engineer
Tarana WirelessMilpitas, CA, US- Promoted
Principal FPGA Design Engineer
CadenceSan Jose, CA, US- Promoted
Platform FPGA Design
RivosSanta Clara, CA, USPrincipal FPGA Design Engineer
Cadence Design Systems, Inc.SAN JOSE 11Validation Engineer (FPGA)
NetAppSan Jose, CA, USSr FPGA Engineer
CyientCaliforniaFPGA Design / Verification Engineer
Butler Aerospace & DefenseSunnyvale, CaliforniaPrincipal FPGA Electrical Engineer
OracleSanta Clara, CA, United States- Promoted
FPGA / ASIC Engineer
Nesco ResourceSan Jose, CA, US- Promoted
- New!
Senior FPGA Prototyping Engineer - Hardware
NVIDIASanta Clara, CA, US- Promoted
ASIC / FPGA Project Engineer III
Clearance JobsSunnyvale, CA, US- Promoted
Technical Staff Engineer - Architecture (FPGA Security)
Microchip TechnologySan Jose, CA, US- Promoted
Design Engineer
BKF EngineersSan Jose, CA, US- Promoted
Sr. FPGA Design Engineer, Silicon and Systems Group
AmazonSunnyvale, CA, US- Promoted
ASIC / FPGA Design Engineer III
Lockheed MartinSunnyvale, CA, US- Promoted
Senior FPGA Design Engineer (E)
KLA-BelgiumMilpitas, CA, United StatesSr. FPGA Design Engineer, Silicon and Systems Group
Amazon.com Services LLCSunnyvale, California, USAFPGA Design Engineer
KLAMilpitas, CA- Promoted
Design Engineer
VirtualVocationsSanta Clara, California, United States- american sign language interpreter (from $ 70,941 to $ 551,925 year)
- investment banker (from $ 144,400 to $ 249,600 year)
- cardiothoracic surgeon (from $ 174,600 to $ 248,150 year)
- forensic pathologist (from $ 135,000 to $ 244,941 year)
- director of software engineering (from $ 183,000 to $ 240,000 year)
- psychiatrist (from $ 50,000 to $ 240,000 year)
- radiologist (from $ 57,103 to $ 238,613 year)
- chief investment officer (from $ 155,794 to $ 235,505 year)
- engineering director (from $ 151,059 to $ 235,000 year)
- product director (from $ 164,997 to $ 235,000 year)
- Palm Bay, FL (from $ 145,000 to $ 224,450 year)
- Chicago, IL (from $ 142,500 to $ 222,000 year)
- Sioux Falls, SD (from $ 168,700 to $ 216,200 year)
- El Cajon, CA (from $ 108,500 to $ 213,875 year)
- Virginia Beach, VA (from $ 139,500 to $ 207,500 year)
- Los Angeles, CA (from $ 135,000 to $ 206,075 year)
- San Diego, CA (from $ 135,000 to $ 195,000 year)
- Austin, TX (from $ 130,000 to $ 184,250 year)
- Orlando, FL (from $ 145,600 to $ 182,499 year)
- Chula Vista, CA (from $ 129,618 to $ 179,190 year)
The average salary range is between $ 126,510 and $ 192,300 year , with the average salary hovering around $ 150,000 year .
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FPGA / ASIC Validation, Staff Engineer
SynopsysSunnyvale, CA, US- Full-time
FPGA / ASIC Validation, Staff Engineer
Job Title : FPGA / ASIC Validation, Staff Engineer
Location : Sunnyvale, California
Job Category : Engineering
Job Subcategory : ASIC Digital Design
Hire Type : Employee
Remote Eligible : No
Salary : $192,000
We Are :
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are :
You are a highly skilled engineer with a passion for digital design and verification. You thrive in dynamic environments and are always eager to take on new challenges. Your attention to detail and analytical mindset allow you to tackle complex problems and deliver high-quality solutions. You have a strong foundation in FPGA design and are proficient in Verilog and SystemVerilog. You are well-versed in using various development tools and have experience in creating user documentation and test plans. You are a proactive team player who communicates effectively and collaborates seamlessly with cross-functional teams. Your technical prowess is complemented by your ability to understand and modify software drivers and scripts. You are committed to continuous learning and staying updated with the latest industry trends and technologies. Your previous experience in hardware development or verification positions you as a seasoned professional ready to make a significant impact at Synopsys.
What You'll Be Doing :
- RTL and FPGA design, implementation, and timing closure using Xilinx & Synopsys development tools.
- Verify the design in simulation using Verilog, SystemVerilog, and UVM (Universal Verification Methodology).
- Create user documentation.
- Create test plans for USB IP.
- Bring up and validate the design in the lab and generate test reports.
- Perform hardware validation tasks and debug IPs.
- Read, understand, and modify software drivers and scripts.
The Impact You Will Have :
What You'll Need :
Who You Are :
The Team You'll Be A Part Of :
You will join a dynamic team of engineers dedicated to pushing the boundaries of digital design and verification. Our team focuses on developing and validating high-performance silicon chips and software content. We collaborate closely with cross-functional teams to deliver integrated solutions that meet the evolving needs of our customers and the industry.
Rewards and Benefits :
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.